1. Short title, extent and commencement.—(1) This Act may be called the Semiconductor
Integrated Circuits Layout-Design Act, 2000.
(2) It extends to the whole of India.
(3) It shall come into force on such date1
as the Central Government may, by notification in the
Official Gazette, appoint; and different dates may be appointed for different provisions of this Act, and
any reference in any such provision to the commencement of this Act shall be construed as a reference to
the coming into force of that provision.
2. Definitions.—In this Act, unles the context otherwise requires,—
(a) “Appellate Board” means the Appellate Board established under section 32;
(b) “assignment” means an assignment in writing by act of the parties concerned;
(c) “Bench” means a Bench of the Appellate Board;
(d) “Chairperson” means the Chairperson of the Appellate Board;
(e) “commercial exploitation”, in relation to Semiconductor Integrated Circuits Layout-Design,
means to sell, lease, offer or exhibit for sale or otherwise distribute such semiconductor integrated
circuit for any commercial purpose;
(f) “convention country” means a country notified as such under section 93;
(g) “Judicial Member” means a Member of the Appellate Board appointed as such under this Act,
and includes the Chairperson or such Vice-Chairperson who possesses any of the qualifications
specified in sub-section (3) of section 34;
1. 1st May, 2004 (Ss. 3 and 5), vide notification No. S.O. 278(E), dated 12th February, 2004, see Gazette of India, Extraordinary,
Part II, sec. 3(ii).
15th January, 2014 (Ss. 93 and 94), vide notification No. S.O. 84(E), dated 10th January, 2014, see Gazette of India,
Extraordinary, Part II, sec. 3(ii).
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(h) “layout-design” means a layout of transistors and other circuitry elements and includes lead
wires connecting such elements and expressed in any manner in a semiconductor integrated circuit;
(i) “Member” means a Judicial Member or a Technical Member of the Appellate Board and
includes the Chairperson and the Vice-Chairperson;
(j) “notify" means to notify in the Semiconductor Integrated Circuit Journal published by the
Registrar;
(k) “prescribed” means prescribed by rules made under this Act;
(l) “register” means the Register of Layout-Designs referred to in section 6;
(m) “registered” (with its grammatical variations) means registered under this Act;
(n) “registered layout-design" means a layout-design which is actually on the register;
(o) “registered proprietor”, in relation to a layout-design, means the person for the time being
entered in the register as proprietor of the layout-design;
(p) “registered user” means a person who is for the time being registered as such under section
25;
(q) “Registrar” means the Registrar of Semiconductor Integrated Circuits Layout-Design referred
to in section 3;
(r) “semiconductor integrated circuit” means a product having transistors and other circuitry
elements which are inseparably formed on a semiconductor material or an insulating material or
inside the semiconductor material and designed to perform an electronic circuitry function;
(s) “Technical Member” means a Member of the Appellate Board who is not a Judicial Member
and includes the Chairperson or such Vice-Chairperson who possesses any of the qualifications
specified in sub-section (4) of section 34;
(t) “transmission” means transmission by operation of law, devolution on the personal
representation of a deceased person or any other mode of transfer not being assignment;
(u) “Vice-Chairperson” means the Vice-Chairperson of the Appellate Board;
(v) any reference to the Semiconductor Integrated Circuits Layout-Design Registry shall be
construed as including a reference to any office of the Semiconductor Integrated Circuits LayoutDesign Registry